PHiLIP
port_nucleo_f103rb.h
1 /*
2  * Copyright 2020 Kevin Weiss for HAW Hamburg
3  *
4  * This file is subject to the terms and conditions of the MIT License. See the
5  * file LICENSE in the top level directory for more details.
6  * SPDX-License-Identifier: MIT
7  */
8 
9 /*
10  ******************************************************************************
11  * @file port_nucleo_f103rb.h
12  * @author Kevin Weiss
13  * @date 12.03.2020
14  * @brief nucleo_f103rb specific porting.
15  ******************************************************************************
16  */
17 
18 #ifndef PORT_NUCLEO_F103RB_H_
19 #define PORT_NUCLEO_F103RB_H_
20 
21 /******************************************************************************/
22 /* Pin and Ports defines ******************************************************/
23 /******************************************************************************/
24 #define LED0_Pin GPIO_PIN_5
25 #define LED0_GPIO_Port GPIOA
26 
27 #define DEBUG0_Pin GPIO_PIN_3
28 #define DEBUG0_GPIO_Port GPIOB
29 #define DEBUG1_Pin GPIO_PIN_4
30 #define DEBUG1_GPIO_Port GPIOB
31 #define DEBUG2_Pin GPIO_PIN_2
32 #define DEBUG2_GPIO_Port GPIOD
33 
34 /******************************************************************************/
35 #define TEST_PASS_Pin GPIO_PIN_4
36 #define TEST_PASS_GPIO_Port GPIOA
37 #define TEST_WARN_Pin GPIO_PIN_0
38 #define TEST_WARN_GPIO_Port GPIOA
39 #define TEST_FAIL_Pin GPIO_PIN_1
40 #define TEST_FAIL_GPIO_Port GPIOA
41 
42 #define USER_BTN_Pin GPIO_PIN_13
43 #define USER_BTN_GPIO_Port GPIOC
44 #define DUT_RST_Pin GPIO_PIN_2
45 #define DUT_RST_GPIO_Port GPIOB
46 
47 /******************************************************************************/
48 #define DUT_ADC_Pin GPIO_PIN_0
49 #define DUT_ADC_GPIO_Port GPIOB
50 
51 #define PM_LO_ADC_Pin GPIO_PIN_1
52 #define PM_LO_ADC_GPIO_Port GPIOC
53 #define PM_HI_ADC_Pin GPIO_PIN_2
54 #define PM_HI_ADC_GPIO_Port GPIOC
55 #define PM_V_ADC_Pin GPIO_PIN_0
56 #define PM_V_ADC_GPIO_Port GPIOC
57 
58 /******************************************************************************/
59 #define DUT_TX_Pin GPIO_PIN_9
60 #define DUT_TX_GPIO_Port GPIOA
61 #define DUT_RX_Pin GPIO_PIN_10
62 #define DUT_RX_GPIO_Port GPIOA
63 #define DUT_CTS_Pin GPIO_PIN_11
64 #define DUT_CTS_GPIO_Port GPIOA
65 #define DUT_RTS_Pin GPIO_PIN_12
66 #define DUT_RTS_GPIO_Port GPIOA
67 
68 /******************************************************************************/
69 #define DUT_IC_Pin GPIO_PIN_8
70 #define DUT_IC_GPIO_Port GPIOA
71 
72 /******************************************************************************/
73 #define IF_TX_Pin GPIO_PIN_2
74 #define IF_TX_GPIO_Port GPIOA
75 #define IF_RX_Pin GPIO_PIN_3
76 #define IF_RX_GPIO_Port GPIOA
77 
78 /******************************************************************************/
79 #define DUT_NSS_Pin GPIO_PIN_12
80 #define DUT_NSS_GPIO_Port GPIOB
81 #define DUT_SCK_Pin GPIO_PIN_13
82 #define DUT_SCK_GPIO_Port GPIOB
83 #define DUT_MISO_Pin GPIO_PIN_14
84 #define DUT_MISO_GPIO_Port GPIOB
85 #define DUT_MOSI_Pin GPIO_PIN_15
86 #define DUT_MOSI_GPIO_Port GPIOB
87 
88 /******************************************************************************/
89 #define DUT_SCL_Pin GPIO_PIN_8
90 #define DUT_SCL_GPIO_Port GPIOB
91 #define DUT_SDA_Pin GPIO_PIN_9
92 #define DUT_SDA_GPIO_Port GPIOB
93 
94 /******************************************************************************/
95 #define DUT_PWM_Pin GPIO_PIN_8
96 #define DUT_PWM_GPIO_Port GPIOC
97 #define DUT_DAC_Pin GPIO_PIN_9
98 #define DUT_DAC_GPIO_Port GPIOC
99 
100 /******************************************************************************/
101 /* GPIO defines ***************************************************************/
102 /******************************************************************************/
103 #define LED_OFF GPIO_PIN_RESET
104 
105 #define GPIO_DEBUG0_INT EXTI3_IRQHandler
106 #define GPIO_DEBUG0_IRQ EXTI3_IRQn
107 #define GPIO_DEBUG1_INT EXTI4_IRQHandler
108 #define GPIO_DEBUG1_IRQ EXTI4_IRQn
109 #define GPIO_DEBUG2_INT EXTI2_IRQHandler
110 #define GPIO_DEBUG2_IRQ EXTI2_IRQn
111 
112 #define GPIO_NSS_CTS_INT EXTI15_10_IRQHandler
113 #define GPIO_NSS_CTS_IRQ EXTI15_10_IRQn
114 
115 /******************************************************************************/
116 /* BOARD defines **************************************************************/
117 /******************************************************************************/
118 #define RCC_HSE_STATE RCC_HSE_BYPASS
119 
120 #define BOARD_ID 0
121 
122 /******************************************************************************/
123 /* SPI defines ****************************************************************/
124 /******************************************************************************/
125 #define DUT_SPI_INST SPI2
126 
127 #define DUT_SPI_CLK_EN() __HAL_RCC_SPI2_CLK_ENABLE()
128 #define DUT_SPI_CLK_DIS() __HAL_RCC_SPI2_CLK_DISABLE()
129 #define DUT_SPI_GPIO_CLK_EN() __HAL_RCC_GPIOB_CLK_ENABLE()
130 
131 #define DUT_SPI_GPIO_AF_REMAP()
132 
133 #define DUT_SPI_INT SPI2_IRQHandler
134 #define DUT_SPI_IRQ SPI2_IRQn
135 
136 #define GPIO_NSS_IRQ GPIO_NSS_CTS_IRQ
137 
138 /******************************************************************************/
139 /* I2C defines ****************************************************************/
140 /******************************************************************************/
141 #define DUT_I2C_INST I2C1
142 
143 #define DUT_I2C_CLK_EN() __HAL_RCC_I2C1_CLK_ENABLE()
144 #define DUT_I2C_CLK_DIS() __HAL_RCC_I2C1_CLK_DISABLE()
145 #define DUT_I2C_GPIO_CLK_EN() __HAL_RCC_GPIOB_CLK_ENABLE()
146 
147 #define DUT_I2C_GPIO_AF_REMAP() __HAL_AFIO_REMAP_I2C1_ENABLE()
148 
149 #define DUT_I2C_EV_INT I2C1_EV_IRQHandler
150 #define DUT_I2C_EV_IRQ I2C1_EV_IRQn
151 #define DUT_I2C_ERR_INT I2C1_ER_IRQHandler
152 #define DUT_I2C_ERR_IRQ I2C1_ER_IRQn
153 
154 /******************************************************************************/
155 /* UART defines ***************************************************************/
156 /******************************************************************************/
157 #define DUT_UART_INST USART1
158 
159 #define DUT_UART_CLK_EN() __HAL_RCC_USART1_CLK_ENABLE()
160 #define DUT_UART_CLK_DIS() __HAL_RCC_USART1_CLK_DISABLE()
161 #define DUT_UART_GPIO_CLK_EN() __HAL_RCC_GPIOA_CLK_ENABLE()
162 
163 #define DUT_UART_INT USART1_IRQHandler
164 #define DUT_UART_IRQ USART1_IRQn
165 
166 #define GPIO_CTS_IRQ GPIO_NSS_CTS_IRQ
167 
168 #define DUT_UART_RX_DMA_INST DMA1_Channel5
169 #define DUT_UART_DMA_RX_INT DMA1_Channel5_IRQHandler
170 #define DUT_UART_DMA_RX_IRQ DMA1_Channel5_IRQn
171 
172 /******************************************************************************/
173 #define IF_UART_INST USART2
174 
175 #define IF_UART_CLK_EN() __HAL_RCC_USART2_CLK_ENABLE()
176 #define IF_UART_CLK_DIS() __HAL_RCC_USART2_CLK_DISABLE()
177 #define IF_UART_CLK_GPIO_EN() __HAL_RCC_GPIOA_CLK_ENABLE()
178 
179 #define IF_UART_INT USART2_IRQHandler
180 #define IF_UART_IRQ USART2_IRQn
181 
182 #define IF_UART_DMA_RX_INST DMA1_Channel6
183 #define IF_UART_DMA_RX_INT DMA1_Channel6_IRQHandler
184 #define IF_UART_DMA_RX_IRQ DMA1_Channel6_IRQn
185 
186 #define IF_UART_DMA_TX_INST DMA1_Channel7
187 #define IF_UART_DMA_TX_INT DMA1_Channel7_IRQHandler
188 #define IF_UART_DMA_TX_IRQ DMA1_Channel7_IRQn
189 
190 /******************************************************************************/
191 /* PWM_DAC defines ************************************************************/
192 /******************************************************************************/
193 #define DUT_PWM_DAC_INST TIM3
194 #define DUT_PWM_TMR DUT_PWM_DAC_INST
195 #define DUT_DAC_TMR DUT_PWM_DAC_INST
196 
197 #define DUT_PWM_DAC_CLK_EN() __HAL_RCC_TIM3_CLK_ENABLE()
198 #define DUT_PWM_DAC_CLK_DIS() __HAL_RCC_TIM3_CLK_DISABLE()
199 #define DUT_PWM_DAC_GPIO_CLK_EN() __HAL_RCC_GPIOC_CLK_ENABLE()
200 
201 #define DUT_PWM_DAC_GPIO_AF_REMAP() __HAL_AFIO_REMAP_TIM3_ENABLE();
202 
203 /******************************************************************************/
204 /* IC defines *****************************************************************/
205 /******************************************************************************/
206 #define DUT_IC_INST TIM1
207 #define DUT_IC_CHANNEL TIM_CHANNEL_1
208 
209 #define DUT_IC_CLK_EN() __HAL_RCC_TIM1_CLK_ENABLE()
210 #define DUT_IC_GPIO_CLK_EN() __HAL_RCC_GPIOA_CLK_ENABLE()
211 
212 #define DUT_IC_CLK_DIS() __HAL_RCC_TIM1_CLK_DISABLE()
213 
214 #define DUT_IC_DMA_INST DMA1_Channel2
215 #define DUT_IC_DMA_ID TIM_DMA_ID_CC1
216 
217 #define DUT_IC_DMA_INT DMA1_Channel2_IRQHandler
218 #define DUT_IC_DMA_IRQ DMA1_Channel2_IRQn
219 #define DUT_IC_GPIO_INT EXTI9_5_IRQHandler
220 #define DUT_IC_GPIO_IRQ EXTI9_5_IRQn
221 
222 /******************************************************************************/
223 /* ADC defines ****************************************************************/
224 /******************************************************************************/
225 #define DUT_ADC_INST ADC2
226 #define ADC_CHANNEL ADC_CHANNEL_8
227 
228 #define DUT_ADC_CLK_EN() __HAL_RCC_ADC2_CLK_ENABLE()
229 #define DUT_ADC_GPIO_CLK_EN() __HAL_RCC_GPIOA_CLK_ENABLE()
230 
231 #define DUT_ADC_CLK_DIS() __HAL_RCC_ADC2_CLK_DISABLE()
232 
233 #define ADC_INT ADC1_2_IRQHandler
234 #define ADC_IRQ ADC1_2_IRQn
235 
236 #endif /* PORT_NUCLEO_F103RB_H_ */